原代码

;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
;* File Name          : startup_stm32f40xx.s
;* Author             : MCD Application Team
;* @version           : V1.8.0
;* @date              : 09-November-2016
;* Description        : STM32F40xxx/41xxx devices vector table for MDK-ARM toolchain. 
;*                      Same as startup_stm32f40_41xxx.s and maintained for legacy purpose 
;*                      This module performs:
;*                      - Set the initial SP
;*                      - Set the initial PC == Reset_Handler
;*                      - Set the vector table entries with the exceptions ISR address
;*                      - Configure the system clock and the external SRAM mounted on 
;*                        STM324xG-EVAL board to be used as data memory (optional, 
;*                        to be enabled by user)
;*                      - Branches to __main in the C library (which eventually
;*                        calls main()).
;*                      After Reset the CortexM4 processor is in Thread mode,
;*                      priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>   
;*******************************************************************************
; 
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
; You may not use this file except in compliance with the License.
; You may obtain a copy of the License at:
; 
;        http://www.st.com/software_license_agreement_liberty_v2
; 
; Unless required by applicable law or agreed to in writing, software 
; distributed under the License is distributed on an "AS IS" BASIS, 
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
; 
;*******************************************************************************; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>Stack_Size      EQU     0x00000400AREA    STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem       SPACE   Stack_Size
__initial_sp; <h> Heap Configuration
;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>Heap_Size       EQU     0x00000200AREA    HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem        SPACE   Heap_Size
__heap_limitPRESERVE8THUMB; Vector Table Mapped to Address 0 at ResetAREA    RESET, DATA, READONLYEXPORT  __VectorsEXPORT  __Vectors_EndEXPORT  __Vectors_Size__Vectors       DCD     __initial_sp               ; Top of StackDCD     Reset_Handler              ; Reset HandlerDCD     NMI_Handler                ; NMI HandlerDCD     HardFault_Handler          ; Hard Fault HandlerDCD     MemManage_Handler          ; MPU Fault HandlerDCD     BusFault_Handler           ; Bus Fault HandlerDCD     UsageFault_Handler         ; Usage Fault HandlerDCD     0                          ; ReservedDCD     0                          ; ReservedDCD     0                          ; ReservedDCD     0                          ; ReservedDCD     SVC_Handler                ; SVCall HandlerDCD     DebugMon_Handler           ; Debug Monitor HandlerDCD     0                          ; ReservedDCD     PendSV_Handler             ; PendSV HandlerDCD     SysTick_Handler            ; SysTick Handler; External InterruptsDCD     WWDG_IRQHandler                   ; Window WatchDog                                        DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection                        DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line            DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line                       DCD     FLASH_IRQHandler                  ; FLASH                                           DCD     RCC_IRQHandler                    ; RCC                                             DCD     EXTI0_IRQHandler                  ; EXTI Line0                                             DCD     EXTI1_IRQHandler                  ; EXTI Line1                                             DCD     EXTI2_IRQHandler                  ; EXTI Line2                                             DCD     EXTI3_IRQHandler                  ; EXTI Line3                                             DCD     EXTI4_IRQHandler                  ; EXTI Line4                                             DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0                                   DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1                                   DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2                                   DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3                                   DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4                                   DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5                                   DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6                                   DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s                            DCD     CAN1_TX_IRQHandler                ; CAN1 TX                                                DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0                                               DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1                                               DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE                                               DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s                                    DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9                   DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10                 DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare                                   DCD     TIM2_IRQHandler                   ; TIM2                                            DCD     TIM3_IRQHandler                   ; TIM3                                            DCD     TIM4_IRQHandler                   ; TIM4                                            DCD     I2C1_EV_IRQHandler                ; I2C1 Event                                             DCD     I2C1_ER_IRQHandler                ; I2C1 Error                                             DCD     I2C2_EV_IRQHandler                ; I2C2 Event                                             DCD     I2C2_ER_IRQHandler                ; I2C2 Error                                               DCD     SPI1_IRQHandler                   ; SPI1                                            DCD     SPI2_IRQHandler                   ; SPI2                                            DCD     USART1_IRQHandler                 ; USART1                                          DCD     USART2_IRQHandler                 ; USART2                                          DCD     USART3_IRQHandler                 ; USART3                                          DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s                                  DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line                  DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line                        DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12                  DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13                 DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare                                   DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7                                           DCD     FSMC_IRQHandler                   ; FSMC                                            DCD     SDIO_IRQHandler                   ; SDIO                                            DCD     TIM5_IRQHandler                   ; TIM5                                            DCD     SPI3_IRQHandler                   ; SPI3                                            DCD     UART4_IRQHandler                  ; UART4                                           DCD     UART5_IRQHandler                  ; UART5                                           DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors                   DCD     TIM7_IRQHandler                   ; TIM7                   DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0                                   DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1                                   DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2                                   DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3                                   DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4                                   DCD     ETH_IRQHandler                    ; Ethernet                                        DCD     ETH_WKUP_IRQHandler               ; Ethernet Wakeup through EXTI line                      DCD     CAN2_TX_IRQHandler                ; CAN2 TX                                                DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0                                               DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1                                               DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE                                               DCD     OTG_FS_IRQHandler                 ; USB OTG FS                                      DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5                                   DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6                                   DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7                                   DCD     USART6_IRQHandler                 ; USART6                                           DCD     I2C3_EV_IRQHandler                ; I2C3 event                                             DCD     I2C3_ER_IRQHandler                ; I2C3 error                                             DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out                      DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In                       DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI                         DCD     OTG_HS_IRQHandler                 ; USB OTG HS                                      DCD     DCMI_IRQHandler                   ; DCMI                                            DCD     CRYP_IRQHandler                   ; CRYP crypto                                     DCD     HASH_RNG_IRQHandler               ; Hash and RngDCD     FPU_IRQHandler                    ; FPU__Vectors_End__Vectors_Size  EQU  __Vectors_End - __VectorsAREA    |.text|, CODE, READONLY; Reset handler
Reset_Handler    PROCEXPORT  Reset_Handler             [WEAK]IMPORT  SystemInitIMPORT  __mainLDR     R0, =SystemInitBLX     R0LDR     R0, =__mainBX      R0ENDP; Dummy Exception Handlers (infinite loops which can be modified)NMI_Handler     PROCEXPORT  NMI_Handler                [WEAK]B       .ENDP
HardFault_Handler\PROCEXPORT  HardFault_Handler          [WEAK]B       .ENDP
MemManage_Handler\PROCEXPORT  MemManage_Handler          [WEAK]B       .ENDP
BusFault_Handler\PROCEXPORT  BusFault_Handler           [WEAK]B       .ENDP
UsageFault_Handler\PROCEXPORT  UsageFault_Handler         [WEAK]B       .ENDP
SVC_Handler     PROCEXPORT  SVC_Handler                [WEAK]B       .ENDP
DebugMon_Handler\PROCEXPORT  DebugMon_Handler           [WEAK]B       .ENDP
PendSV_Handler  PROCEXPORT  PendSV_Handler             [WEAK]B       .ENDP
SysTick_Handler PROCEXPORT  SysTick_Handler            [WEAK]B       .ENDPDefault_Handler PROCEXPORT  WWDG_IRQHandler                   [WEAK]                                        EXPORT  PVD_IRQHandler                    [WEAK]                      EXPORT  TAMP_STAMP_IRQHandler             [WEAK]         EXPORT  RTC_WKUP_IRQHandler               [WEAK]                     EXPORT  FLASH_IRQHandler                  [WEAK]                                         EXPORT  RCC_IRQHandler                    [WEAK]                                            EXPORT  EXTI0_IRQHandler                  [WEAK]                                            EXPORT  EXTI1_IRQHandler                  [WEAK]                                             EXPORT  EXTI2_IRQHandler                  [WEAK]                                            EXPORT  EXTI3_IRQHandler                  [WEAK]                                           EXPORT  EXTI4_IRQHandler                  [WEAK]                                            EXPORT  DMA1_Stream0_IRQHandler           [WEAK]                                EXPORT  DMA1_Stream1_IRQHandler           [WEAK]                                   EXPORT  DMA1_Stream2_IRQHandler           [WEAK]                                   EXPORT  DMA1_Stream3_IRQHandler           [WEAK]                                   EXPORT  DMA1_Stream4_IRQHandler           [WEAK]                                   EXPORT  DMA1_Stream5_IRQHandler           [WEAK]                                   EXPORT  DMA1_Stream6_IRQHandler           [WEAK]                                   EXPORT  ADC_IRQHandler                    [WEAK]                         EXPORT  CAN1_TX_IRQHandler                [WEAK]                                                EXPORT  CAN1_RX0_IRQHandler               [WEAK]                                               EXPORT  CAN1_RX1_IRQHandler               [WEAK]                                                EXPORT  CAN1_SCE_IRQHandler               [WEAK]                                                EXPORT  EXTI9_5_IRQHandler                [WEAK]                                    EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]                  EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]                EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK] EXPORT  TIM1_CC_IRQHandler                [WEAK]                                   EXPORT  TIM2_IRQHandler                   [WEAK]                                            EXPORT  TIM3_IRQHandler                   [WEAK]                                            EXPORT  TIM4_IRQHandler                   [WEAK]                                            EXPORT  I2C1_EV_IRQHandler                [WEAK]                                             EXPORT  I2C1_ER_IRQHandler                [WEAK]                                             EXPORT  I2C2_EV_IRQHandler                [WEAK]                                            EXPORT  I2C2_ER_IRQHandler                [WEAK]                                               EXPORT  SPI1_IRQHandler                   [WEAK]                                           EXPORT  SPI2_IRQHandler                   [WEAK]                                            EXPORT  USART1_IRQHandler                 [WEAK]                                          EXPORT  USART2_IRQHandler                 [WEAK]                                          EXPORT  USART3_IRQHandler                 [WEAK]                                         EXPORT  EXTI15_10_IRQHandler              [WEAK]                                  EXPORT  RTC_Alarm_IRQHandler              [WEAK]                  EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]                        EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]                 EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]                 EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK] EXPORT  TIM8_CC_IRQHandler                [WEAK]                                   EXPORT  DMA1_Stream7_IRQHandler           [WEAK]                                          EXPORT  FSMC_IRQHandler                   [WEAK]                                             EXPORT  SDIO_IRQHandler                   [WEAK]                                             EXPORT  TIM5_IRQHandler                   [WEAK]                                             EXPORT  SPI3_IRQHandler                   [WEAK]                                             EXPORT  UART4_IRQHandler                  [WEAK]                                            EXPORT  UART5_IRQHandler                  [WEAK]                                            EXPORT  TIM6_DAC_IRQHandler               [WEAK]                   EXPORT  TIM7_IRQHandler                   [WEAK]                    EXPORT  DMA2_Stream0_IRQHandler           [WEAK]                                  EXPORT  DMA2_Stream1_IRQHandler           [WEAK]                                   EXPORT  DMA2_Stream2_IRQHandler           [WEAK]                                    EXPORT  DMA2_Stream3_IRQHandler           [WEAK]                                    EXPORT  DMA2_Stream4_IRQHandler           [WEAK]                                 EXPORT  ETH_IRQHandler                    [WEAK]                                         EXPORT  ETH_WKUP_IRQHandler               [WEAK]                     EXPORT  CAN2_TX_IRQHandler                [WEAK]                                               EXPORT  CAN2_RX0_IRQHandler               [WEAK]                                               EXPORT  CAN2_RX1_IRQHandler               [WEAK]                                               EXPORT  CAN2_SCE_IRQHandler               [WEAK]                                               EXPORT  OTG_FS_IRQHandler                 [WEAK]                                       EXPORT  DMA2_Stream5_IRQHandler           [WEAK]                                   EXPORT  DMA2_Stream6_IRQHandler           [WEAK]                                   EXPORT  DMA2_Stream7_IRQHandler           [WEAK]                                   EXPORT  USART6_IRQHandler                 [WEAK]                                           EXPORT  I2C3_EV_IRQHandler                [WEAK]                                              EXPORT  I2C3_ER_IRQHandler                [WEAK]                                              EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]                      EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]                      EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]                        EXPORT  OTG_HS_IRQHandler                 [WEAK]                                      EXPORT  DCMI_IRQHandler                   [WEAK]                                             EXPORT  CRYP_IRQHandler                   [WEAK]                                     EXPORT  HASH_RNG_IRQHandler               [WEAK]EXPORT  FPU_IRQHandler                    [WEAK]WWDG_IRQHandler                                                       
PVD_IRQHandler                                      
TAMP_STAMP_IRQHandler                  
RTC_WKUP_IRQHandler                                
FLASH_IRQHandler                                                       
RCC_IRQHandler                                                            
EXTI0_IRQHandler                                                          
EXTI1_IRQHandler                                                           
EXTI2_IRQHandler                                                          
EXTI3_IRQHandler                                                         
EXTI4_IRQHandler                                                          
DMA1_Stream0_IRQHandler                                       
DMA1_Stream1_IRQHandler                                          
DMA1_Stream2_IRQHandler                                          
DMA1_Stream3_IRQHandler                                          
DMA1_Stream4_IRQHandler                                          
DMA1_Stream5_IRQHandler                                          
DMA1_Stream6_IRQHandler                                          
ADC_IRQHandler                                         
CAN1_TX_IRQHandler                                                            
CAN1_RX0_IRQHandler                                                          
CAN1_RX1_IRQHandler                                                           
CAN1_SCE_IRQHandler                                                           
EXTI9_5_IRQHandler                                                
TIM1_BRK_TIM9_IRQHandler                        
TIM1_UP_TIM10_IRQHandler                      
TIM1_TRG_COM_TIM11_IRQHandler  
TIM1_CC_IRQHandler                                               
TIM2_IRQHandler                                                           
TIM3_IRQHandler                                                           
TIM4_IRQHandler                                                           
I2C1_EV_IRQHandler                                                         
I2C1_ER_IRQHandler                                                         
I2C2_EV_IRQHandler                                                        
I2C2_ER_IRQHandler                                                           
SPI1_IRQHandler                                                          
SPI2_IRQHandler                                                           
USART1_IRQHandler                                                       
USART2_IRQHandler                                                       
USART3_IRQHandler                                                      
EXTI15_10_IRQHandler                                            
RTC_Alarm_IRQHandler                            
OTG_FS_WKUP_IRQHandler                                
TIM8_BRK_TIM12_IRQHandler                      
TIM8_UP_TIM13_IRQHandler                       
TIM8_TRG_COM_TIM14_IRQHandler  
TIM8_CC_IRQHandler                                               
DMA1_Stream7_IRQHandler                                                 
FSMC_IRQHandler                                                            
SDIO_IRQHandler                                                            
TIM5_IRQHandler                                                            
SPI3_IRQHandler                                                            
UART4_IRQHandler                                                          
UART5_IRQHandler                                                          
TIM6_DAC_IRQHandler                            
TIM7_IRQHandler                              
DMA2_Stream0_IRQHandler                                         
DMA2_Stream1_IRQHandler                                          
DMA2_Stream2_IRQHandler                                           
DMA2_Stream3_IRQHandler                                           
DMA2_Stream4_IRQHandler                                        
ETH_IRQHandler                                                         
ETH_WKUP_IRQHandler                                
CAN2_TX_IRQHandler                                                           
CAN2_RX0_IRQHandler                                                          
CAN2_RX1_IRQHandler                                                          
CAN2_SCE_IRQHandler                                                          
OTG_FS_IRQHandler                                                    
DMA2_Stream5_IRQHandler                                          
DMA2_Stream6_IRQHandler                                          
DMA2_Stream7_IRQHandler                                          
USART6_IRQHandler                                                        
I2C3_EV_IRQHandler                                                          
I2C3_ER_IRQHandler                                                          
OTG_HS_EP1_OUT_IRQHandler                           
OTG_HS_EP1_IN_IRQHandler                            
OTG_HS_WKUP_IRQHandler                                
OTG_HS_IRQHandler                                                   
DCMI_IRQHandler                                                            
CRYP_IRQHandler                                                    
HASH_RNG_IRQHandler
FPU_IRQHandlerB       .ENDPALIGN;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************IF      :DEF:__MICROLIBEXPORT  __initial_spEXPORT  __heap_baseEXPORT  __heap_limitELSEIMPORT  __use_two_region_memoryEXPORT  __user_initial_stackheap__user_initial_stackheapLDR     R0, =  Heap_MemLDR     R1, =(Stack_Mem + Stack_Size)LDR     R2, = (Heap_Mem +  Heap_Size)LDR     R3, = Stack_MemBX      LRALIGNENDIFEND;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

框架讲解

STM32F40xx 系列微控制器的标准启动代码（Startup Code）（汇编语言编写）用于芯片复位后的初始化和引导流程。

整体结构与功能

设置堆栈（Stack/Heap）：定义程序运行时的栈和堆空间。
向量表（Vector Table）：存储中断和异常处理函数的地址，复位后由硬件自动加载。
复位处理流程：初始化系统时钟，跳转到 C 语言的main函数。
默认中断处理函数：提供未实现中断的默认处理（死循环），用户可自定义替换。

详细代码解析

;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
; 文件名: startup_stm32f40xx.s
; 作者: MCD Application Team
; @version: V1.8.0
; @date: 09-November-2016
; 描述: STM32F40xxx/41xxx设备的向量表，用于MDK-ARM工具链。
;       与startup_stm32f40_41xxx.s相同，为遗留目的而维护。
;       本模块执行以下操作：
;       - 设置初始堆栈指针（SP）
;       - 设置初始程序计数器（PC）等于复位处理程序（Reset_Handler）
;       - 在向量表条目中设置异常中断服务程序（ISR）的地址
;       - 配置系统时钟和STM324xG-EVAL板上的外部SRAM，用作数据存储器（可选，用户启用）
;       - 跳转到C库中的__main（最终调用main()）。
;       复位后，Cortex-M4处理器处于线程模式，优先级为特权级，堆栈设置为主堆栈。
; <<< 在上下文菜单中使用配置向导 >>>
;*******************************************************************************; 许可证信息...; 为堆栈分配的内存量（以字节为单位）
; 根据应用程序的需要调整此值
; <h> 堆栈配置
;   <o> 堆栈大小（以字节为单位） <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size      EQU     0x00000400 ; 堆栈大小定义为1024字节AREA    STACK, NOINIT, READWRITE, ALIGN=3 ; 定义一个名为STACK的内存区域，未初始化，可读可写，8字节对齐
Stack_Mem       SPACE   Stack_Size ; 在STACK区域中分配Stack_Size大小的空间
__initial_sp      ; 堆栈顶部指针的标记; <h> 堆配置
;   <o>  堆大小（以字节为单位） <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size       EQU     0x00000200 ; 堆大小定义为512字节AREA    HEAP, NOINIT, READWRITE, ALIGN=3 ; 定义一个名为HEAP的内存区域，未初始化，可读可写，8字节对齐
__heap_base      ; 堆基地址的标记
Heap_Mem        SPACE   Heap_Size ; 在HEAP区域中分配Heap_Size大小的空间
__heap_limit     ; 堆限制地址的标记PRESERVE8 ; 确保堆栈8字节对齐THUMB     ; 指示接下来的代码以Thumb指令集执行; 向量表映射到复位时的地址0AREA    RESET, DATA, READONLY ; 定义一个名为RESET的内存区域，数据段，只读EXPORT  __Vectors ; 导出向量表符号，使其可在其他文件中引用EXPORT  __Vectors_End ; 导出向量表结束符号EXPORT  __Vectors_Size ; 导出向量表大小符号__Vectors       DCD     __initial_sp       ; 向量表第一项：堆栈顶部地址DCD     Reset_Handler      ; 向量表第二项：复位处理程序地址DCD     NMI_Handler        ; 向量表第三项：NMI处理程序地址; ...（其他异常和中断处理程序地址）DCD     FPU_IRQHandler     ; 向量表最后一项：FPU中断处理程序地址__Vectors_End   ; 向量表结束标记__Vectors_Size  EQU  __Vectors_End - __Vectors ; 计算向量表大小AREA    |.text|, CODE, READONLY ; 定义一个名为.text的内存区域，代码段，只读; 复位处理程序
Reset_Handler    PROCEXPORT  Reset_Handler         [WEAK] ; 弱导出Reset_Handler，允许用户覆盖IMPORT  SystemInit                   ; 导入SystemInit函数IMPORT  __main                       ; 导入__main函数LDR     R0, =SystemInit      ; 将SystemInit函数的地址加载到R0寄存器BLX     R0                   ; 跳转到SystemInit函数执行LDR     R0, =__main          ; 将__main函数的地址加载到R0寄存器BX      R0                   ; 跳转到__main函数执行ENDP                         ; 结束Reset_Handler过程; 虚拟异常处理程序（无限循环，可以修改）
NMI_Handler     PROCEXPORT  NMI_Handler         [WEAK] ; 弱导出NMI_Handler，允许用户覆盖B       .                   ; 无限循环ENDP                         ; 结束NMI_Handler过程; ...（其他异常处理程序，结构类似NMI_Handler）Default_Handler PROC; 为所有未覆盖的外部中断处理程序提供默认实现; ...（列出所有外部中断处理程序的弱导出）B       .                   ; 无限循环ENDP                         ; 结束Default_Handler过程ALIGN   ; 确保接下来的代码按字对齐; 用户堆栈和堆初始化（如果使用微库，则不需要此部分）IF      :DEF:__MICROLIBEXPORT  __initial_spEXPORT  __heap_baseEXPORT  __heap_limitELSEIMPORT  __use_two_region_memoryEXPORT  __user_initial_stackheap__user_initial_stackheapLDR     R0, =  Heap_Mem      ; 加载堆基地址到R0LDR     R1, =(Stack_Mem + Stack_Size) ; 计算堆栈顶部地址并加载到R1LDR     R2, = (Heap_Mem +  Heap_Size) ; 加载堆限制地址到R2LDR     R3, = Stack_Mem      ; 加载堆栈基地址到R3BX      LR                   ; 返回ALIGN   ; 确保接下来的代码按字对齐ENDIFEND     ; 结束文件;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

Q&A

1.AREA STACK, NOINIT, READWRITE, ALIGN=3什么意思

AREA 指令：
这是 ARM 汇编语言中的一个伪指令，用于定义一个内存区域（Section）。
语法：AREA 区域名, 属性1, 属性2, …
STACK：
这是你给这个内存区域起的名字，可以自定义，但通常习惯用 “STACK” 表示栈区域。
NOINIT：
这个属性表示该内存区域不需要初始化。
也就是说，系统不会在启动时为这个区域填充初始值（如 0），其内容是未定义的。
栈空间通常不需要预先初始化，因为程序运行时会动态使用它。
READWRITE：
表示该区域具有读写权限。
栈需要能够被程序读写（压栈和出栈操作），所以设置为读写属性。
ALIGN=3：
指定该区域的起始地址要按 2 的幂次方对齐。
ALIGN=3 表示按 2³ = 8 字节对齐。
这样可以确保栈的起始地址是 8 的倍数，提高内存访问效率。